Integrated circuits have, in general, been formed having coplanar surface portions of regions to which electrical interconnections are made. In such integrated circuits, isolation between the elements on the same substrate has been achieved by high temperature processes such as diffusing isolating regions of opposite conductivity type through the epitaxial layer, or by removing such regions and refilling them with insulating material such as, for example, oxides or polycrystalline semiconductor material.
Such integrated circuits have required relatively large spacing between active elements, at least partly because of such high temperature isolation processing, thereby limiting the number of active and/or passive elements which may be formed in a given size semiconductor.
The size of the semiconductor chip which is formed affects the yield of chips formed from a wafer of semiconductor material because, for example, if a wafer has one hundred surface defects and is used to form only one hundred chips, well over half of the chips will include a defect, but if the wafer is used to form one thousand chips, less than ten percent of the chips will have such a defect.
In addition, such processes require many individual masking steps in which all elements of all chips on a semiconductor wafer must align with each mask within a few microns. Masks which are aligned in one portion of the wafer with respect to a previous masking operation may be out of registry in other portions of the wafer.
In addition, the distance from the metal conductors to the collector junction regions through the collector semiconductor material is relatively large when such conductors are positioned on the surface of the integrated circuit. As a result, the epitaxially grown layer used for the collector region must be made relatively low resistance, thereby reducing the collector resitance to a value below optimum for many circuit designs. In those designs where a higher collector resistance is required, an extra diffusion step is generally used to form a channel down into a high conductivity subcollector region.